The present invention relates to a semiconductor storage device and, particularly, to technology that can be effectively utilized for a semiconductor storage device designed to have a mass storage capacity such as a dynamic RAM (random access memory) using external lead terminals of, for example, LOC (Lead-On-Chip) technology.
Peripheral circuits are arranged on a semiconductor memory having a LOC (Lead-On-Chip) structure generally by arranging the bonding pads along the central portion in the lengthwise direction of the chip, and arranging address buffers and address decoders to correspond to input signals such as address signals that are input through the bonding pads. Such a semiconductor memory has been disclosed in Japanese Patent Laid-Open No. 5-343634.